Part Number Hot Search : 
BAR63J C1210 NTE7024 CLM285Y2 10C682J SC6200 SQ2143 HT66F016
Product Description
Full Text Search
 

To Download ATMEGA324PA-14 Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
  atmel-8272fs-avr--07/2014 features z high-performance, low-power 8-bit atmel ? avr ? microcontroller z advanced risc architecture ? 131 powerful instructions ? most single-clock cycle execution ? 32 8 general purpose working registers ? fully static operation ? up to 20mips throughput at 20mhz ? on-chip 2-cycle multiplier z high endurance non-volatile memory segments ? 16/32/64/128kbytes of in-system self-programmable flash program memory ? 512/1k/2k/4kbytes eeprom ? 1/2/4/16kbytes internal sram ? write/erase cycles: 10,000 flash/ 100,000 eeprom ? data retention: 20 years at 85c/ 100 years at 25c (1) ? optional boot code section with independent lock bits z in-system programming by on-chip boot program z true read-while-write operation ? programming lock for software security z atmel qtouch ? library support ? capacitive touch buttons, sliders and wheels ? qtouch and qmatrix acquisition ? up to 64 sense channels z jtag (ieee std. 1149.1 compliant) interface ? boundary-scan capabilities according to the jtag standard ? extensive on-chip debug support ? programming of flash, eeprom, fuses, and lock bits through the jtag interface z peripheral features ? two 8-bit timer/counters with separate prescalers and compare modes ? one/two 16-bit timer/counter with separate prescaler, compare mode, and capture mode ? real time counter with separate oscillator ? six pwm channels ? 8-channel, 10-bit adc z differential mode with selectable gain at 1, 10 or 200 ? byte-oriented two-wire serial interface ? two programmable serial usart ? master/slave spi serial interface atmega164a/164pa/324a/3 24pa/644a/644pa/1284/1284p 8-bit atmel microcontrolle r with 16/32/64/128k bytes in-system programmable flash datasheet summary
2 atmega164a/164pa/324a/324pa/644a/644 pa/1284/1284p [datasheet summary] atmel-8272fs-avr--07/2014 ? programmable watchdog timer with separate on-chip oscillator ? on-chip analog comparator ? interrupt and wake-up on pin change z special microcontroller features ? power-on reset and programmable brown-out detection ? internal calibrated rc oscillator ? external and internal interrupt sources ? six sleep modes: idle, adc noise reduction, power-save, power-down, standby and extended standby z i/o and packages ? 32 programmable i/o lines ? 40-pin pdip, 44-lead tqfp, 44-pad vqfn/qfn/mlf ? 44-pad drqfn ? 49-ball vfbga z operating voltages ? 1.8 - 5.5v z speed grades ? 0 - 4mhz @ 1.8 - 5.5v ? 0 - 10mhz @ 2.7 - 5.5v ? 0 - 20mhz @ 4.5 - 5.5v z power consumption at 1mhz, 1.8v, 25 c ? active: 0.4ma ? power-down mode: 0.1a ? power-save mode: 0.6a (including 32khz rtc) note: 1. see ?data retention? on page 9 for details.
3 atmega164a/164pa/324a/324pa/644a/644 pa/1284/1284p [datasheet summary] atmel-8272fs-avr--07/2014 1. pin configurations 1.1 pinout - pdip/tqfp/vqfn/qfn/mlf for atmega164a/164pa/324a/324pa/644a/644pa/1284/1284p figure 1-1. pinout. note: the large center pad underneath the vqfn/qfn/mlf package should be soldered to ground on the board to ensure good mechanical stability. (pcint8/xck0/t0) pb0 (pcint9/clko/t1) pb1 (pcint10/int2/ain0) pb2 (pcint11/oc0a/ain1) pb3 (pcint12/oc0b/ss) pb4 (pcint13/icp3/mosi) pb5 (pcint14/oc3a/miso) pb6 (pcint15/oc3b/sck) pb7 reset vcc gnd xtal2 xtal1 (pcint24/rxd0/t3*) pd0 (pcint25/txd0) pd1 (pcint26/rxd1/int0) pd2 (pcint27/txd1/int1) pd3 (pcint28/xck1/oc1b) pd4 (pcint29/oc1a) pd5 (pcint30/oc2b/icp) pd6 pa0 (adc0/pcint0) pa1 (adc1/pcint1) pa2 (adc2/pcint2) pa3 (adc3/pcint3) pa4 (adc4/pcint4) pa5 (adc5/pcint5) pa6 (adc6/pcint6) pa7 (adc7/pcint7) aref gnd avcc pc7 (tosc2/pcint23) pc6 (tosc1/pcint22) pc5 (tdi/pcint21) pc4 (tdo/pcint20) pc3 (tms/pcint19) pc2 (tck/pcint18) pc1 (sda/pcint17) pc0 (scl/pcint16) pd7 (oc2a/pcint31) pa4 (adc4/pcint4) pa5 (adc5/pcint5) pa6 (adc6/pcint6) pa7 (adc7/pcint7) aref gnd avcc pc7 (tosc2/pcint23) pc6 (tosc1/pcint22) pc5 (tdi/pcint21) pc4 (tdo/pcint20) (pcint13/icp3/mosi) pb5 (pcint14/oc3a/miso) pb6 (pcint15/oc3b/sck) pb7 reset vcc gnd xtal2 xtal1 (pcint24/rxd0/t3*) pd0 (pcint25/txd0) pd1 (pcint26/rxd1/int0) pd2 (pcint27/txd1/int1) pd3 (pcint28/xck1/oc1b) pd4 (pcint29/oc1a) pd5 (pcint30/oc2b/icp) pd6 (pcint31/oc2a) pd7 vcc gnd (pcint16/scl) pc0 (pcint17/sda) pc1 (pcint18/tck) pc2 (pcint19/tms) pc3 pb4 (ss/oc0b/pcint12) pb3 (ain1/oc0a/pcint11) pb2 (ain0/int2/pcint10) pb1 (t1/clko/pcint9) pb0 (xck0/t0/pcint8) gnd vcc pa0 (adc0/pcint0) pa1 (adc1/pcint1) pa2 (adc2/pcint2) pa3 (adc3/pcint3) tqfp/qfn/mlf *t3 is only available for atmega1284/1284p
4 atmega164a/164pa/324a/324pa/644a/644 pa/1284/1284p [datasheet summary] atmel-8272fs-avr--07/2014 1.2 pinout - drqfn for atmel atmega164a/164pa/324a/324pa figure 1-2. drqfn - pinout. table 1-1. drqfn - pinout. a1 pb5 a7 pd3 a13 pc4 a19 pa3 b1 pb6 b6 pd4 b11 pc5 b16 pa2 a2 pb7 a8 pd5 a14 pc6 a20 pa1 b2 reset b7 pd6 b12 pc7 b17 pa0 a3 vcc a9 pd7 a15 avcc a21 vcc b3 gnd b8 vcc b13 gnd b18 gnd a4 xtal2 a10 gnd a16 aref a22 pb0 b4 xtal1 b9 pc0 b14 pa7 b19 pb1 a5 pd0 a11 pc1 a17 pa6 a23 pb2 b5 pd1 b10 pc2 b15 pa5 b20 pb3 a6 pd2 a12 pc3 a18 pa4 a24 pb4 top view bottom view a1 b1 a2 b2 a3 b3 a4 b4 a5 b5 a6 a18 b15 a17 b14 a16 b13 a15 b12 a14 b11 a13 a12 b10 a11 b9 a10 b8 a9 b7 a8 b6 a7 a24 b20 a23 b19 a22 b18 a21 b17 a20 b16 a19 a18 b15 a17 b14 a16 b13 a15 b12 a14 b11 a13 a1 b1 a2 b2 a3 b3 a4 b4 a5 b5 a6 a7 b6 a8 b7 a9 b8 a10 b9 a11 b10 a12 a19 b16 a20 b17 a21 b18 a22 b19 a23 b20 a24
5 atmega164a/164pa/324a/324pa/644a/644 pa/1284/1284p [datasheet summary] atmel-8272fs-avr--07/2014 1.3 pinout - vfbga for atmel atmega164a/164pa/324a/324pa figure 1-3. vfbga - pinout. 2. overview the atmel atmega164a/164pa/324a/324pa/644a/644 pa/1284/1284p is a low-power cmos 8-bit microcontroller based on the avr enhanced risc architec ture. by executing powerful instructions in a single clock cycle, the atmega164a/1 64pa/324a/324pa/644a/644pa/1284 /1284p achieves throughputs approaching 1 mips per mhz allowing the system designer to optimize power consumption versus processing speed. table 1-2. bga - pinout. 1234567 a gnd pb4 pb2 gnd vcc pa2 gnd b pb6 pb5 pb3 pb0 pa0 pa3 pa5 c vcc reset pb7 pb1 pa1 pa6 aref d gnd xtal2 pd0 gnd pa4 pa7 gnd e xtal1 pd1 pd5 pd7 pc5 pc7 avcc f pd2 pd3 pd6 pc0 pc2 pc4 pc6 g gnd pd4 vcc gnd pc1 pc3 gnd a b c d e f g 1 234567 a b c d e f g 765432 1 top view bottom view
6 atmega164a/164pa/324a/324pa/644a/644 pa/1284/1284p [datasheet summary] atmel-8272fs-avr--07/2014 2.1 block diagram figure 2-1. block diagram. the avr core combines a rich instruction set with 32 ge neral purpose working registers. all the 32 registers are directly connected to the arithmetic logic unit (alu), allowing two independent regist ers to be accessed in one single instruction executed in one clock cycle. the resulti ng architecture is more code efficient while achieving throughputs up to ten times faster than conventional cisc microcontrollers. the atmel atmega164a/164pa/324a/324pa/644a/644pa/ 1284/1284p provide the following features: 16/32/64/128kbytes of in-system programmable flash with read-while-write capabilities, 512/1k/2k/4kbytes eeprom, 1/2/4/16kbytes sram, 32 gener al purpose i/o lines, 32 general purpose working re gisters, real time counter (rtc), three (four for atmega1284/1284p) flexible timer/counters with compare modes and pwm, 2 usarts, a byte oriented two-wire serial interf ace, a 8-channel, 10-bit adc with optional differential input stage with programmable gain, pr ogrammable watchdog timer with internal oscillator, an spi serial port, ieee std. 1149.1 compliant jtag test interface, al so used for accessing the on-chip debug system and programming and six software selectab le power saving modes. the idle mo de stops the cpu wh ile allowing the sram, timer/counters, spi port, and interrupt system to continue functioning. th e power-down mode saves the register contents but freezes the oscillator, disabling all other chip fu nctions until the ne xt interrupt or hardware reset. in power-save mode, the asynchronous ti mer continues to run, allowin g the user to maintain a cpu gnd vcc reset power supervision por / bod & reset watchdog oscillator watchdog timer oscillator circuits / clock generation xtal1 xtal2 port a (8) port d (8) pd7..0 port c (8) pc5..0 twi spi eeprom jtag/ocd 16bit t/c 1 8bit t/c 2 8bit t/c 0 sram flash usart 0 internal bandgap reference analog comparator a/d converter pa7..0 port b (8) pb7..0 usart 1 tosc1/pc6 tosc2/pc7 16bit t/c 1 16bit t/c 3* * only available in atmega1284/1284p
7 atmega164a/164pa/324a/324pa/644a/644 pa/1284/1284p [datasheet summary] atmel-8272fs-avr--07/2014 timer base while the rest of the dev ice is sleeping. the adc noise reduct ion mode stops the cpu and all i/o modules except asynchronous timer and adc, to mi nimize switching noise during adc conversions. in standby mode, the crystal/reso nator oscillator is running while the rest of the device is sle eping. this allows very fast start-up combin ed with low power consumption. in extended standby mode, both the main oscillator and the asynchronous timer continue to run. atmel offers the qtouch ? library for embedding capacitive touch button s, sliders and wheels functionality into avr microcontrollers. the patented charge-transfer signal acquisition offers robust sensing and includes fully debounced reporting of touch keys and includes adjacent key suppression ? (aks ? ) technology for unambiguous detection of key events. the easy-to-use qt ouch suite toolchain allows you to explore, develop and debug your own touch applications. the device is manufactured using at mel?s high-density nonvolatile memory technology. the on-chip isp flash allows the program memory to be reprogrammed in-system through an spi serial interface, by a conventional nonvolatile memory programmer, or by an on-chip boot program running on the avr core. the boot program can use any interface to download the application progr am in the application flash memory. software in the boot flash section will continue to ru n while the application flash sectio n is updated, providing true read- while-write operation. by combining an 8-bit risc cpu with in-system self-programmable flash on a monolithic chip, the atmel atmega164a/164pa/32 4a/324pa/644a/644pa/1284/1284p is a powerful microcontroller that provides a highly flexible and cost effective solution to many embedded control applications. the atmega164a/164pa/324a/324pa/644a/644pa/1284/128 4p is supported with a full suite of program and system development tools including: c compilers, macro assemblers, progra m debugger/simulators, in-circuit emulators, and evaluation kits. 2.2 comparison between atmega164a, atmega164pa, atmega324a, atmega324pa, atmega644a, atmega644pa, atmega1284 and atmega1284p 2.3 pin descriptions11 2.3.1 vc digital supply voltage. 2.3.2 gnd ground. table 2-1. differences between atmega164a, atme ga164pa, atmega324a, atmega324pa, atmega644a, atmega644pa, atmega1284 and atmega1284p. device flash eeprom ram units atmega164a 16k 512 1k bytes atmega164pa 16k 512 1k atmega324a 32k 1k 2k atmega324pa 32k 1k 2k atmega644a 64k 2k 4k atmega644pa 64k 2k 4k atmega1284 128k 4k 16k atmega1284p 128k 4k 16k
8 atmega164a/164pa/324a/324pa/644a/644 pa/1284/1284p [datasheet summary] atmel-8272fs-avr--07/2014 2.3.3 port a (pa7:pa0) port a serves as analog inputs to the analog-to-digital converter. port a also serves as an 8-bit bi-directional i/o port with internal pull-up resistors (selected for each bit). the port a output buffers have sy mmetrical drive characteristi cs with both high sink and so urce capability. as inputs, port a pins that are externa lly pulled low will source curren t if the pull-up resistors are activated. the port a pins are tri-stated when a reset condition become s active, even if the clock is not running. port a also serves the functions of various special features of the atmel atmega164a/164pa/324a/324pa/644a/644pa/1284/1284p as listed on page 79 . 2.3.4 port b (pb7:pb0) port b is an 8-bit bi-directional i/o port with internal pu ll-up resistors (selected for each bit). the port b output buffers have symmetrical drive characteristics with both high sink and source capability. as inputs, port b pins that are externally pulled low will source current if the pull-up resistors are activated. the port b pins are tri- stated when a reset condition becomes active, even if the clock is not running. port b also serves the functions of various special features of the atmega164a/164pa/324a/324pa/644a/644pa/1284/1284p as listed on page 80 . 2.3.5 port c (pc7:pc0) port c is an 8-bit bi-directional i/o port with internal pu ll-up resistors (selected for ea ch bit). the port c output buffers have symmetrical drive characteristics with both high sink and source capability. as inputs, port c pins that are externally pulled low will source current if the pull-up resistors are activated. the port c pins are tri- stated when a reset condition becomes active, even if the clock is not running. port c also serves the functions of the jtag in terface, along with specia l features of the atmel atmega164a/164pa/324a/324pa/644a/644pa/1284/1284p as listed on page 83 . 2.3.6 port d (pd7:pd0) port d is an 8-bit bi-directional i/o port with internal pu ll-up resistors (selected for ea ch bit). the port d output buffers have symmetrical drive characteristics with both high sink and source capability. as inputs, port d pins that are externally pulled low will source current if the pull-up resistors are activated. the port d pins are tri- stated when a reset condition becomes active, even if the clock is not running. port d also serves the functions of various special features of the atmega164a/164pa/324a/324pa/644a/644pa/1284/1284p as listed on page 86 . 2.3.7 reset reset input. a low leve l on this pin for longer than the minimum pu lse length will generate a reset, even if the clock is not running. the mini mum pulse length is given in ?? on page 325 . shorter pulses are not guaranteed to generate a reset. 2.3.8 xtal1 input to the inverting oscillato r amplifier and input to the in ternal clock operating circuit. 2.3.9 xtal2 output from th e inverting osc illator amplifier. 2.3.10 avcc avcc is the supply voltage pin for port a and the analog-t o-digital converter. it should be externally connected to v cc , even if the adc is not used. if the a dc is used, it should be connected to v cc through a low-pass filter. 2.3.11 aref this is the analog reference pin for the analog-to-digital converter.
9 atmega164a/164pa/324a/324pa/644a/644 pa/1284/1284p [datasheet summary] atmel-8272fs-avr--07/2014 3. resources a comprehensive set of development tools, applicatio n notes and datasheets are available for download on http://www.atmel.com/avr. 4. about code examples this documentation contains simple c ode examples that briefly show how to use various parts of the device. be aware that not all c compiler vendors include bit definiti ons in the header files and interrupt handling in c is compiler dependent. please confirm with the c compiler documentatio n for more details. the code examples assume that the pa rt specific header file is included before compilation. for i/o registers located in extended i/o map, "in", "out", "sbis", "sbic" , "cbi", and "sbi" instructio ns must be replaced with instructions that allow access to extended i/o. ty pically "lds" and "sts" combined with "sbrs", "sbrc", "sbr", and "cbr". note: 1. 5. data retention reliability qualification results show that the projected data retention failure rate is much less than 1 ppm over 20 years at 85c or 100 years at 25c. 6. capacitive touch sensing the atmel qtouch library provides a simple to use soluti on to realize touch sensitive interfaces on most atmel avr microcontrollers. the qtouch library includes suppo rt for the qtouch and qmatrix acquisition methods. touch sensing can be added to any application by linki ng the appropriate atmel qtouch library for the avr microcontroller. this is done by using a simple set of apis to define the touch cha nnels and sensors, and then calling the touch sensing api?s to re trieve the channel info rmation and dete rmine the touch sensor states. the qtouch library is free and downloadable from the atmel website at the following location: www.atmel.com/qtouchlibrary . for implementation details and other information, refer to the atmel qtouch library user guide - also available for download from the atmel website.
10 atmega164a/164pa/324a/324pa/644a/644 pa/1284/1284p [datasheet summary] atmel-8272fs-avr--07/2014 7. register summary address name bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 page (0xff) reserved - - - - - - - (0xfe) reserved - - - - - - - - (0xfd) reserved - - - - - - - - (0xfc) reserved - - - - - - - - (0xfb) reserved - - - - - - - (0xfa) reserved - - - - - - - - (0xf9) reserved - - - - - - - (0xf8) reserved - - - - - - - - (0xf7) reserved - - - - - - - - (0xf6) reserved - - - - - - - - (0xf5) reserved - - - - - - - (0xf4) reserved - - - - - - - - (0xf3) reserved - - - - - - - - (0xf2) reserved - - - - - - - - (0xf1) reserved - - - - - - - (0xf0) reserved - - - - - - - - (0xef) reserved - - - - - - - (0xee) reserved - - - - - - - - (0xed) reserved - - - - - - - - (0xec) reserved - - - - - - - - (0xeb) reserved - - - - - - - (0xea) reserved - - - - - - - - (0xe9) reserved - - - - - - - - (0xe8) reserved - - - - - - - - (0xe7) reserved - - - - - - - (0xe6) reserved - - - - - - - - (0xe5) reserved - - - - - - - - (0xe4) reserved - - - - - - - - (0xe3) reserved - - - - - - - (0xe2) reserved - - - - - - - - (0xe1) reserved - - - - - - - (0xe0) reserved - - - - - - - (0xdf) reserved - - - - - - - - (0xde) reserved - - - - - - - - (0xdd) reserved - - - - - - - - (0xdc) reserved - - - - - - - (0xdb) reserved - - - - - - - - (0xda) reserved - - - - - - - - (0xd9) reserved - - - - - - - - (0xd8) reserved - - - - - - - - (0xd7) reserved - - - - - - - - (0xd6) reserved - - - - - - - - (0xd5) reserved - - - - - - - - (0xd4) reserved - - - - - - - - (0xd3) reserved - - - - - - - - (0xd2) reserved - - - - - - - - (0xd1) reserved - - - - - - - - (0xd0) reserved - - - - - - - - (0xcf) reserved - - - - - - - - (0xce) udr1 usart1 i/o data register 185 (0xcd) ubrr1h - - - - usart1 baud rate register high byte 189 / 202 (0xcc) ubrr1l usart1 baud rate register low byte 189 / 202 (0xcb) reserved - - - - - - - - (0xca) ucsr1c umsel11 umsel10 upm11 upm10 usbs1 ucsz11/udord0 (5) ucsz10/ucpha0 (5) ucpol1 187 / 201 (0xc9) ucsr1b rxcie1 txcie1 udrie1 rxen1 txen1 ucsz12 rxb81 txb81 186 / 200 (0xc8) ucsr1a rxc1 txc1 udre1 fe1 dor1 upe1 u2x1 mpcm1 185 / 200 (0xc7) reserved - - - - - - - - (0xc6) udr0 usart0 i/o data register 185 (0xc5) ubrr0h - - - - usart0 baud rate register high byte 189 / 202 (0xc4) ubrr0l usart0 baud rate register low byte 189 / 202 (0xc3) reserved - - - - - - - - (0xc2) ucsr0c umsel01 umsel00 upm01 upm00 usbs0 ucsz01/udord0 (5) ucsz00/ucpha0 (5) ucpol0 187 / 201 (0xc1) ucsr0b rxcie0 txcie0 udrie0 rxen0 txen0 ucsz02 rxb80 txb80 186 / 200
11 atmega164a/164pa/324a/324pa/644a/644 pa/1284/1284p [datasheet summary] atmel-8272fs-avr--07/2014 (0xc0) ucsr0a rxc0 txc0 udre0 fe0 dor0 upe0 u2x0 mpcm0 185 / 200 (0xbf) reserved - - - - - - - - (0xbe) reserved - - - - - - - - (0xbd) twamr twam6 twam5 twam4 twam3 twam2 twam1 twam0 - 231 (0xbc) twcr twint twea twsta twsto twwc twen -twie 228 (0xbb) twdr two-wire serial interface data register 230 (0xba) twar twa6 twa5 twa4 twa3 twa2 twa1 twa0 twgce 231 (0xb9) twsr tws7 tws6 tws5 tws4 tws3 - twps1 twps0 229 (0xb8) twbr two-wire serial interface bit rate register 228 (0xb7) reserved - - - - - - - - (0xb6) assr - exclk as2 tcn2ub ocr2aub ocr2bub tcr2aub tcr2bub 155 (0xb5) reserved - - - - - - - - (0xb4) ocr2b timer/counter2 output compare register b 155 (0xb3) ocr2a timer/counter2 output compare register a 155 (0xb2) tcnt2 timer/counter2 (8 bit) 154 (0xb1) tccr2b foc2a foc2b - - wgm22 cs22 cs21 cs20 153 (0xb0) tccr2a com2a1 com2a0 com2b1 com2b0 - -wgm21wgm20 151 (0xaf) reserved - - - - - - - - (0xae) reserved - - - - - - - - (0xad) reserved - - - - - - - - (0xac) reserved - - - - - - - - (0xab) reserved - - - - - - - - (0xaa) reserved - - - - - - - - (0xa9) reserved - - - - - - - - (0xa8) reserved - - - - - - - - (0xa7) reserved - - - - - - - - (0xa6) reserved - - - - - - - - (0xa5) reserved - - - - - - - - (0xa4) reserved - - - - - - - - (0xa3) reserved - - - - - - - - (0xa2) reserved - - - - - - - - (0xa1) reserved - - - - - - - - (0xa0) reserved - - - - - - - - (0x9f) reserved - - - - - - - - (0x9e) reserved - - - - - - - - (0x9d) reserved - - - - - - - - (0x9c) reserved - - - - - - - - (0x9b) ocr3bh timer/counter3 - output compare register b high byte (7) 132 (0x9a) ocr3bl timer/counter3 - output compare register b low byte (7) 132 (0x99) ocr3ah timer/counter3 - output compare register a high byte (7) 132 (0x98) ocr3al timer/counter3 - output compare register a low byte (7) 132 (0x97) icr3h timer/counter3 - input capture register high byte (7) 133 (0x96) icr3l timer/counter3 - input capture register low byte (7) 133 (0x95) tcnt3h timer/counter3 - counter register high byte (7) 132 (0x94) tcnt3l timer/counter3 - counter register low byte (7) 132 (0x93) reserved - - - - - - - - (0x92) tccr3c foc3a foc3b - - - - - - 131 (0x91) tccr3b icnc3 ices3 - wgm33 wgm32 cs32 cs31 cs30 130 (0x90) tccr3a com3a1 com3a0 com3b1 com3b0 - -wgm31wgm30 128 (0x8f) reserved - - - - - - - - (0x8e) reserved - - - - - - - - (0x8d) reserved - - - - - - - - (0x8c) reserved - - - - - - - - (0x8b) ocr1bh timer/counter1 - output compare register b high byte 132 (0x8a) ocr1bl timer/counter1 - output compare register b low byte 132 (0x89) ocr1ah timer/counter1 - output compare register a high byte 132 (0x88) ocr1al timer/counter1 - output compare register a low byte 132 (0x87) icr1h timer/counter1 - input capture register high byte 133 (0x86) icr1l timer/counter1 - input capture register low byte 133 (0x85) tcnt1h timer/counter1 - counter register high byte 132 (0x84) tcnt1l timer/counter1 - counter register low byte 132 (0x83) reserved - - - - - - - - (0x82) tccr1c foc1a foc1b - - - - - - 131 (0x81) tccr1b icnc1 ices1 - wgm13 wgm12 cs12 cs11 cs10 130 (0x80) tccr1a com1a1 com1a0 com1b1 com1b0 - -wgm11wgm10 128 (0x7f) didr1 - - - - - -ain1dain0d 234 (0x7e) didr0 adc7d adc6d adc5d adc4d adc3d adc2d adc1d adc0d 253 (0x7d) reserved - - - - - - - - address name bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 page
12 atmega164a/164pa/324a/324pa/644a/644 pa/1284/1284p [datasheet summary] atmel-8272fs-avr--07/2014 (0x7c) admux refs1 refs0 adlar mux4 mux3 mux2 mux1 mux0 249 (0x7b) adcsrb -acme - - - adts2 adts1 adts0 233 (0x7a) adcsra aden adsc adate adif adie adps2 adps1 adps0 250 (0x79) adch adc data register high byte 251 (0x78) adcl adc data register low byte 251 (0x77) reserved - - - - - - - - (0x76) reserved - - - - - - - - (0x75) reserved - - - - - - - - (0x74) reserved - - - - - - - - (0x73) pcmsk3 pcint31 pcint30 pcint29 pcint28 pcint27 pcint26 pcint25 pcint24 70 (0x72) reserved - - - - - - - - (0x71) timsk3 - -icie3 - - ocie3b ocie3a toie3 134 (0x70) timsk2 - - - - - ocie2b ocie2a toie2 156 (0x6f) timsk1 - -icie1 - - ocie1b ocie1a toie1 134 (0x6e) timsk0 - - - - - ocie0b ocie0a toie0 105 (0x6d) pcmsk2 pcint23 pcint22 pcint21 pcint20 pcint19 pcint18 pcint17 pcint16 70 (0x6c) pcmsk1 pcint15 pcint14 pcint13 pcint12 pcint11 pcint10 pcint9 pcint8 70 (0x6b) pcmsk0 pcint7 pcint6 pcint5 pcint4 pcint3 pcint2 pcint1 pcint0 71 (0x6a) reserved - - - - - - - - (0x69) eicra - - isc21 isc20 isc11 isc10 isc01 isc00 67 (0x68) pcicr - - - - pcie3 pcie2 pcie1 pcie0 69 (0x67) reserved - - - - - - - - (0x66) osccal oscillator calibration register 40 (0x65) prr1 - - - - - - ---prtim3 49 (0x64) prr0 prtwi prtim2 prtim0 prusart1 prtim1 prspi prusart0 pradc 48 (0x63) reserved - - - - - - - - (0x62) reserved - - - - - - - - (0x61) clkpr clkpce - - - clkps3 clkps2 clkps1 clkps0 40 (0x60) wdtcsr wdif wdie wdp3 wdce wde wdp2 wdp1 wdp0 59 0x3f (0x5f) sreg i t h s v n z c 11 0x3e (0x5e) sph sp15 sp14 sp13 sp12 sp11 sp10 sp9 sp8 12 0x3d (0x5d) spl sp7 sp6 sp5 sp4 sp3 sp2 sp1 sp0 12 0x3c (0x5c) reserved - - - - - - - - 0x3b (0x5b) reserved - - - - - - - - 0x3a (0x5a) reserved - - - - - - - - 0x39 (0x59) reserved - - - - - - - - 0x38 (0x58) reserved - - - - - - - - 0x37 (0x57) spmcsr spmie rwwsb sigrd rwwsre blbset pgwrt pgers spmen 285 0x36 (0x56) reserved - - - - - - - - 0x35 (0x55) mcucr jtd bods (6) bodse (6) pud - - ivsel ivce 89 / 268 0x34 (0x54) mcusr - - - jtrf wdrf borf extrf porf 58 / 268 0x33 (0x53) smcr - - - - sm2 sm1 sm0 se 47 0x32 (0x52) reserved - - - - - - - - 0x31 (0x51) ocdr on-chip debug register 259 0x30 (0x50) acsr acd acbg aco aci acie acic acis1 acis0 250 0x2f (0x4f) reserved - - - - - - - - 0x2e (0x4e) spdr spi 0 data register 166 0x2d (0x4d) spsr spif0 wcol0 - - - - -spi2x0 165 0x2c (0x4c) spcr spie0 spe0 dord0 mstr0 cpol0 cpha0 spr01 spr00 164 0x2b (0x4b) gpior2 general purpose i/o register 2 29 0x2a (0x4a) gpior1 general purpose i/o register 1 29 0x29 (0x49) reserved - - - - - - - - 0x28 (0x48) ocr0b timer/counter0 output compare register b 105 0x27 (0x47) ocr0a timer/counter0 output compare register a 105 0x26 (0x46) tcnt0 timer/counter0 (8 bit) 105 0x25 (0x45) tccr0b foc0a foc0b - - wgm02 cs02 cs01 cs00 104 0x24 (0x44) tccr0a com0a1 com0a0 com0b1 com0b0 - -wgm01wgm00 105 0x23 (0x43) gtccr tsm - - - - - psrasy psrsync 157 0x22 (0x42) eearh - - - - eeprom address register high byte 24 0x21 (0x41) eearl eeprom address register low byte 24 0x20 (0x40) eedr eeprom data register 24 0x1f (0x3f) eecr - - eepm1 eepm0 eerie eempe eepe eere 24 0x1e (0x3e) gpior0 general purpose i/o register 0 29 0x1d (0x3d) eimsk - - - - - int2 int1 int0 68 0x1c (0x3c) eifr - - - - - intf2 intf1 intf0 68 0x1b (0x3b) pcifr - - - - pcif3 pcif2 pcif1 pcif0 69 0x1a (0x3a) reserved - - - - - - - - 0x19 (0x39) reserved - - - - - - - - address name bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 page
13 atmega164a/164pa/324a/324pa/644a/644 pa/1284/1284p [datasheet summary] atmel-8272fs-avr--07/2014 notes: 1. for compatibility with future devices, reserved bits s hould be written to zero if accessed. reserved i/o memory addresses should never be written. 2. i/o registers within the address range $00 - $1f are directly bit-accessible using the sbi and cbi instructions. in these registers, the value of single bits can be ch ecked by using the sbis and sbic instructions. 3. some of the status flags are cleared by writing a logical one to them. note that the cbi an d sbi instructions will operate on all bits in the i/o register, writing a one back into any flag read as set, thus clearing the flag. the cbi and sbi instructions work with registers 0x00 to 0x1f only. 4. when using the i/o specific commands in and out, the i/o addresses $00 - $3f must be used. when addressing i/o registers as data space using ld and st instru ctions, $20 must be added to these addresses. the atmega164a/164pa/324a/324pa/644a/644pa/1284/1284p is a complex microcontroller with more peripheral units than can be supported within the 64 location reserved in opcode for the in and out instructions. for the extended i/o space from $60 - $ff, only the st/sts/std and ld/lds/ldd instructions can be used. 5. usart in spi master mode. 6. only available in the atmega164pa/324pa/644pa/1284p. 7. only available in the atmega1284/1284p 0x18 (0x38) tifr3 - -icf3 - - ocf3b ocf3a tov3 136 0x17 (0x37) tifr2 - - - - - ocf2b ocf2a tov2 156 0x16 (0x36) tifr1 - -icf1 - - ocf1b ocf1a tov1 135 0x15 (0x35) tifr0 - - - - - ocf0b ocf0a tov0 106 0x14 (0x34) reserved - - - - - - - - 0x13 (0x33) reserved - - - - - - - - 0x12 (0x32) reserved - - - - - - - - 0x11 (0x31) reserved - - - - - - - - 0x10 (0x30) reserved - - - - - - - - 0x0f (0x2f) reserved - - - - - - - - 0x0e (0x2e) reserved - - - - - - - - 0x0d (0x2d) reserved - - - - - - - - 0x0c (0x2c) reserved - - - - - - - - 0x0b (0x2b) portd portd7 portd6 portd 5 portd4 portd3 portd2 portd1 portd0 90 0x0a (0x2a) ddrd ddd7 ddd6 ddd5 ddd4 ddd3 ddd2 ddd1 ddd0 90 0x09 (0x29) pind pind7 pind6 pind5 pind4 pind3 pind2 pind1 pind0 90 0x08 (0x28) portc portc7 portc6 portc 5 portc4 portc3 portc2 portc1 portc0 90 0x07 (0x27) ddrc ddc7 ddc6 ddc5 ddc4 ddc3 ddc2 ddc1 ddc0 90 0x06 (0x26) pinc pinc7 pinc6 pinc5 pinc4 pinc3 pinc2 pinc1 pinc0 90 0x05 (0x25) portb portb7 portb6 portb5 portb4 portb3 portb2 portb1 portb0 89 0x04 (0x24) ddrb ddb7 ddb6 ddb5 ddb4 ddb3 ddb2 ddb1 ddb0 89 0x03 (0x23) pinb pinb7 pinb6 pinb5 pinb4 pinb3 pinb2 pinb1 pinb0 90 0x02 (0x22) porta porta7 porta6 porta5 porta4 porta3 porta2 porta1 porta0 89 0x01 (0x21) ddra dda7 dda6 dda5 dda4 dda3 dda2 dda1 dda0 89 0x00 (0x20) pina pina7 pina6 pina5 pina4 pina3 pina2 pina1 pina0 89 address name bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 page
14 atmega164a/164pa/324a/324pa/644a/644 pa/1284/1284p [datasheet summary] atmel-8272fs-avr--07/2014 8. instruction set summary mnemonics operands description operation flags #clocks arithmetic and logic instructions add rd, rr add two registers rd rd + rr z,c,n,v,h 1 adc rd, rr add with carry two registers rd rd + rr + c z,c,n,v,h 1 adiw rdl,k add immediate to word rdh:rdl rdh:rdl + k z,c,n,v,s 2 sub rd, rr subtract two registers rd rd - rr z,c,n,v,h 1 subi rd, k subtract constant from register rd rd - k z,c,n,v,h 1 sbc rd, rr subtract with carry two registers rd rd - rr - c z,c,n,v,h 1 sbci rd, k subtract with carry constant from reg. rd rd - k - c z,c,n,v,h 1 sbiw rdl,k subtract immediate from word rdh:rdl rdh:rdl - k z,c,n,v,s 2 and rd, rr logical and registers rd rd ? rr z,n,v 1 andi rd, k logical and register and constant rd rd ? k z,n,v 1 or rd, rr logical or registers rd rd v rr z,n,v 1 ori rd, k logical or register and constant rd rd v k z,n,v 1 eor rd, rr exclusive or registers rd rd rr z,n,v 1 com rd one?s complement rd 0xff ? rd z,c,n,v 1 neg rd two?s complement rd 0x00 ? rd z,c,n,v,h 1 sbr rd,k set bit(s) in register rd rd v k z,n,v 1 cbr rd,k clear bit(s) in register rd rd ? (0xff - k) z,n,v 1 inc rd increment rd rd + 1 z,n,v 1 dec rd decrement rd rd ? 1 z,n,v 1 tst rd test for zero or minus rd rd ? rd z,n,v 1 clr rd clear register rd rd rd z,n,v 1 ser rd set register rd 0xff none 1 mul rd, rr multiply unsigned r1:r0 rd x rr z,c 2 muls rd, rr multiply signed r1:r0 rd x rr z,c 2 mulsu rd, rr multiply signed with unsigned r1:r0 rd x rr z,c 2 fmul rd, rr fractional multiply unsigned r1:r0 (rd x rr) << 1 z,c 2 fmuls rd, rr fractional multiply signed r1:r0 (rd x rr) << 1 z,c 2 fmulsu rd, rr fractional multiply signed with unsigned r1:r0 (rd x rr) << 1 z,c 2 branch instructions rjmp k relative jump pc pc + k + 1 none 2 ijmp indirect jump to (z) pc z none 2 jmp k direct jump pc k none 3 rcall k relative subroutine call pc pc + k + 1 none 3 icall indirect call to (z) pc z none 3 call k direct subroutine call pc k none 4 ret subroutine return pc stack none 4 reti interrupt return pc stack i 4 cpse rd,rr compare, skip if equal if (rd = rr) pc pc + 2 or 3 none 1/2/3 cp rd,rr compare rd ? rr z, n,v,c,h 1 cpc rd,rr compare with carry rd ? rr ? c z, n,v,c,h 1 cpi rd,k compare register with immediate rd ? k z, n,v,c,h 1 sbrc rr, b skip if bit in register cleared if (rr(b)=0) pc pc + 2 or 3 none 1/2/3 sbrs rr, b skip if bit in register is set if (rr(b)=1) pc pc + 2 or 3 none 1/2/3 sbic p, b skip if bit in i/o register cleared if (p(b)=0) pc pc + 2 or 3 none 1/2/3 sbis p, b skip if bit in i/o register is set if (p(b)=1) pc pc + 2 or 3 none 1/2/3 brbs s, k branch if status flag set if (sreg(s) = 1) then pc pc+k + 1 none 1/2 brbc s, k branch if status flag cleared if (sreg(s) = 0) then pc pc+k + 1 none 1/2 breq k branch if equal if (z = 1) then pc pc + k + 1 none 1/2 brne k branch if not equal if (z = 0) then pc pc + k + 1 none 1/2 brcs k branch if carry set if (c = 1) then pc pc + k + 1 none 1/2 brcc k branch if carry cleared if (c = 0) then pc pc + k + 1 none 1/2 brsh k branch if same or higher if (c = 0) then pc pc + k + 1 none 1/2 brlo k branch if lower if (c = 1) then pc pc + k + 1 none 1/2 brmi k branch if minus if (n = 1) then pc pc + k + 1 none 1/2 brpl k branch if plus if (n = 0) then pc pc + k + 1 none 1/2 brge k branch if greater or equal, signed if (n v= 0) then pc pc + k + 1 none 1/2 brlt k branch if less than zero, signed if (n v= 1) then pc pc + k + 1 none 1/2 brhs k branch if half carry flag set if (h = 1) then pc pc + k + 1 none 1/2 brhc k branch if half carry flag cleared if (h = 0) then pc pc + k + 1 none 1/2 brts k branch if t flag set if (t = 1) then pc pc + k + 1 none 1/2 brtc k branch if t flag cleared if (t = 0) then pc pc + k + 1 none 1/2 brvs k branch if overflow flag is set if (v = 1) then pc pc + k + 1 none 1/2
15 atmega164a/164pa/324a/324pa/644a/644 pa/1284/1284p [datasheet summary] atmel-8272fs-avr--07/2014 brvc k branch if overflow flag is cleared if (v = 0) then pc pc + k + 1 none 1/2 brie k branch if interrupt enabled if ( i = 1) then pc pc + k + 1 none 1/2 brid k branch if interrupt disabled if ( i = 0) then pc pc + k + 1 none 1/2 bit and bit-test instructions sbi p,b set bit in i/o register i/o(p,b) 1 none 2 cbi p,b clear bit in i/o register i/o(p,b) 0 none 2 lsl rd logical shift left rd(n+1) rd(n), rd(0) 0 z,c,n,v 1 lsr rd logical shift right rd(n) rd(n+1), rd(7) 0 z,c,n,v 1 rol rd rotate left through carry rd(0) c,rd(n+1) rd(n),c rd(7) z,c,n,v 1 ror rd rotate right through carry rd(7) c,rd(n) rd(n+1),c rd(0) z,c,n,v 1 asr rd arithmetic shift right rd(n) rd(n+1), n=0..6 z,c,n,v 1 swap rd swap nibbles rd(3..0) rd(7..4),rd(7..4) rd(3..0) none 1 bset s flag set sreg(s) 1 sreg(s) 1 bclr s flag clear sreg(s) 0 sreg(s) 1 bst rr, b bit store from register to t t rr(b) t 1 bld rd, b bit load from t to register rd(b) t none 1 sec set carry c 1c1 clc clear carry c 0 c 1 sen set negative flag n 1n1 cln clear negative flag n 0 n 1 sez set zero flag z 1z1 clz clear zero flag z 0 z 1 sei global interrupt enable i 1i1 cli global interrupt disable i 0 i 1 ses set signed test flag s 1s1 cls clear signed test flag s 0 s 1 sev set twos complement overflow. v 1v1 clv clear twos complement overflow v 0 v 1 set set t in sreg t 1t1 clt clear t in sreg t 0 t 1 seh set half carry flag in sreg h 1h1 clh clear half carry flag in sreg h 0 h 1 data transfer instructions mov rd, rr move between registers rd rr none 1 movw rd, rr copy register word rd+1:rd rr+1:rr none 1 ldi rd, k load immediate rd k none 1 ld rd, x load indirect rd (x) none 2 ld rd, x+ load indirect and post-inc. rd (x), x x + 1 none 2 ld rd, - x load indirect and pre-dec. x x - 1, rd (x) none 2 ld rd, y load indirect rd (y) none 2 ld rd, y+ load indirect and post-inc. rd (y), y y + 1 none 2 ld rd, - y load indirect and pre-dec. y y - 1, rd (y) none 2 ldd rd,y+q load indirect with displacement rd (y + q) none 2 ld rd, z load indirect rd (z) none 2 ld rd, z+ load indirect and post-inc. rd (z), z z+1 none 2 ld rd, -z load indirect and pre-dec. z z - 1, rd (z) none 2 ldd rd, z+q load indirect with displacement rd (z + q) none 2 lds rd, k load direct from sram rd (k) none 2 st x, rr store indirect (x) rr none 2 st x+, rr store indirect and post-inc. (x) rr, x x + 1 none 2 st - x, rr store indirect and pre-dec. x x - 1, (x) rr none 2 st y, rr store indirect (y) rr none 2 st y+, rr store indirect and post-inc. (y) rr, y y + 1 none 2 st - y, rr store indirect and pre-dec. y y - 1, (y) rr none 2 std y+q,rr store indirect with displacement (y + q) rr none 2 st z, rr store indirect (z) rr none 2 st z+, rr store indirect and post-inc. (z) rr, z z + 1 none 2 st -z, rr store indirect and pre-dec. z z - 1, (z) rr none 2 std z+q,rr store indirect with displacement (z + q) rr none 2 sts k, rr store direct to sram (k) rr none 2 lpm load program memory r0 (z) none 3 lpm rd, z load program memory rd (z) none 3 lpm rd, z+ load program memory and post-inc rd (z), z z+1 none 3 spm store program memory (z) r1:r0 none - in rd, p in port rd p none 1 out p, rr out port p rr none 1 push rr push register on stack stack rr none 2 pop rd pop register from stack rd stack none 2 mnemonics operands description operation flags #clocks
16 atmega164a/164pa/324a/324pa/644a/644 pa/1284/1284p [datasheet summary] atmel-8272fs-avr--07/2014 mcu control instructions nop no operation none 1 sleep sleep (see specific descr. for sleep function) none 1 wdr watchdog reset (see specific descr. for wdr/timer) none 1 break break for on-chip debug only none n/a mnemonics operands description operation flags #clocks
17 atmega164a/164pa/324a/324pa/644a/644 pa/1284/1284p [datasheet summary] atmel-8272fs-avr--07/2014 9. ordering information 9.1 atmel atmega164a notes: 1. this device can also be supplied in wafer form. please contact your local atmel sales office for detailed ordering information and minimum quantities. 2. pb-free packaging, complies to the european directive for re striction of hazardous substances (rohs directive). also halide free and fully green. 3. for speed vs. v cc see ?speed grades? on page 324 . 4. nipdau lead finish. 5. tape & reel. speed [mhz] (3) power supply ordering code (2) package (1) operational range 20 1.8 - 5.5v atmega164a-au atmega164a-aur (5) atmega164a-pu atmega164a-mu atmega164a-mur (5) atmega164a-mch (4) atmega164a-mchr (4)(5) atmega164a-cu atmega164a-cur (5) 44a 44a 40p6 44m1 44m1 44mc 44mc 49c2 49c2 industrial (-40 o c to 85 o c) package type 44a 44-lead, thin (1.0mm) plastic gull wing quad flat package (tqfp) 40p6 40-pin, 0.600? wide, plastic dual inline package (pdip) 44m1 44-pad, 7 7 1.0mm body, lead pitch 0.50mm, thermally enhanced plastic very thin quad flat no-lead (vqfn) 44mc 44-lead (2-row staggered), 5 5 1.0mm body, 2.60 2.60mm exposed pad, quad flat no-lead package (qfn) 49c2 49-ball, (7 7 array) 0.65mm pitch, 5 5 1mm, very thin, fine-pitch ball grid array package (vfbga)
18 atmega164a/164pa/324a/324pa/644a/644 pa/1284/1284p [datasheet summary] atmel-8272fs-avr--07/2014 9.2 atmel atmega164pa notes: 1. this device can also be supplied in wafer form. please contact your local atmel sales office for detailed ordering information and minimum quantities. 2. pb-free packaging, complies to the european directive for re striction of hazardous substances (rohs directive). also halide free and fully green. 3. for speed vs. v cc see ?speed grades? on page 324 . 4. nipdau lead finish. 5. tape & reel. speed [mhz] (3) power supply ordering code (2) package (1) operational range 20 1.8 - 5.5v atmega164pa-au atmega164pa-aur (5) atmega164pa-pu atmega164pa-mu atmega164pa-mur (5) atmega164pa-mch (4) atmega164pa-mchr (4)(5) atmega164pa-cu atmega164pa-cur (5) 44a 44a 40p6 44m1 44m1 44mc 44mc 49c2 49c2 industrial (-40 o c to 85 o c) package type 44a 44-lead, thin (1.0mm) plastic gull wing quad flat package (tqfp) 40p6 40-pin, 0.600? wide, plastic dual inline package (pdip) 44m1 44-pad, 7 7 1.0mm body, lead pitch 0.50mm, thermally enhanced plastic very thin quad flat no-lead (vqfn) 44mc 44-lead (2-row staggered), 5 5 1.0mm body, 2.60 2.60mm exposed pad, quad flat no-lead package (qfn) 49c2 49-ball, (7 7 array) 0.65mm pitch, 5 5 1mm, very thin, fine-pitch ball grid array package (vfbga)
19 atmega164a/164pa/324a/324pa/644a/644 pa/1284/1284p [datasheet summary] atmel-8272fs-avr--07/2014 9.3 atmel atmega324a notes: 1. this device can also be supplied in wafer form. please contact your local atmel sales office for detailed ordering information and minimum quantities. 2. pb-free packaging, complies to the european directive for re striction of hazardous substances (rohs directive). also halide free and fully green. 3. for speed vs. v cc see ?speed grades? on page 324 . 4. nipdau lead finish. 5. tape & reel. speed [mhz] (3) power supply ordering code (2) package (1) operational range 20 1.8 - 5.5v atmega324a-au atmega324a-aur (5) atmega324a-pu atmega324a-mu atmega324a-mur (5) atmega324a-mch (4) atmega324a-mchr (4)(5) atmega324a-cu atmega324a-cur (5) 44a 44a 40p6 44m1 44m1 44mc 44mc 49c2 49c2 industrial (-40 o c to 85 o c) package type 44a 44-lead, thin (1.0mm) plastic gull wing quad flat package (tqfp) 40p6 40-pin, 0.600? wide, plastic dual inline package (pdip) 44m1 44-pad, 7 7 1.0mm body, lead pitch 0.50mm, thermally enhanced plastic very thin quad flat no-lead (vqfn) 44mc 44-lead (2-row staggered), 5 5 1.0mm body, 2.60 2.60mm exposed pad, quad flat no-lead package (qfn) 49c2 49-ball, (7 7 array) 0.65mm pitch, 5 5 1mm, very thin, fine-pitch ball grid array package (vfbga)
20 atmega164a/164pa/324a/324pa/644a/644 pa/1284/1284p [datasheet summary] atmel-8272fs-avr--07/2014 9.4 atmel atmega324pa notes: 1. this device can also be supplied in wafer form. please contact your local atmel sales office for detailed ordering information and minimum quantities. 2. pb-free packaging, complies to the european directive for re striction of hazardous substances (rohs directive). also halide free and fully green. 3. for speed vs. v cc see ?speed grades? on page 324 . 4. nipdau lead finish. 5. tape & reel. speed [mhz] (3) power supply ordering code (2) package (1) operational range 20 1.8 - 5.5v atmega324pa-au atmega324pa-aur (5) atmega324pa-pu atmega324pa-mu atmega324pa-mur (5) atmega324pa-mch (4) atmega324pa-mchr (4)(5) atmega324pa-cu atmega324pa-cur (5) 44a 44a 40p6 44m1 44m1 44mc 44mc 49c2 49c2 industrial (-40 o c to 85 o c) package type 44a 44-lead, thin (1.0mm) plastic gull wing quad flat package (tqfp) 40p6 40-pin, 0.600? wide, plastic dual inline package (pdip) 44m1 44-pad, 7 7 1.0mm body, lead pitch 0.50mm, thermally enhanced plastic very thin quad flat no-lead (vqfn) 44mc 44-lead (2-row staggered), 5 5 1.0mm body, 2.60 2.60mm exposed pad, quad flat no-lead package (qfn) 49c2 49-ball, (7 7 array) 0.65mm pitch, 5 5 1mm, very thin, fine-pitch ball grid array package (vfbga)
21 atmega164a/164pa/324a/324pa/644a/644 pa/1284/1284p [datasheet summary] atmel-8272fs-avr--07/2014 9.5 atmel atmega644a notes: 1. this device can also be supplied in wafer form. please contact your local atmel sales office for detailed ordering information and minimum quantities. 2. pb-free packaging, complies to the european directive for re striction of hazardous substances (rohs directive). also halide free and fully green. 3. for speed vs. v cc see ?speed grades? on page 324 . 4. taper & reel. speed [mhz] (3) power supply ordering code (2) package (1) operational range 20 1.8 - 5.5v atmega644a-au atmega644a-aur (4) atmega644a-pu atmega644a-mu atmega644a-mur (4) 44a 44a 40p6 44m1 44m1 industrial (-40 o c to 85 o c) package type 44a 44-lead, thin (1.0mm) plastic gull wing quad flat package (tqfp) 40p6 40-pin, 0.600? wide, plastic dual inline package (pdip) 44m1 44-pad, 7 7 1.0mm body, lead pitch 0.5 mm, thermally enhanced plastic very thin quad flat no-lead (vqfn)
22 atmega164a/164pa/324a/324pa/644a/644 pa/1284/1284p [datasheet summary] atmel-8272fs-avr--07/2014 9.6 atmel atmega644pa notes: 1. this device can also be supplied in wafer form. please contact your local atmel sales office for detailed ordering information and minimum quantities. 2. pb-free packaging, complies to the european directive for re striction of hazardous substances (rohs directive). also halide free and fully green. 3. for speed vs. v cc see ?speed grades? on page 324 . 4. taper & reel. speed [mhz] (3) power supply ordering code (2) package (1) operational range 20 1.8 - 5.5v atmega644pa-au atmega644pa-aur (4) atmega644pa-pu atmega644pa-mu atmega644pa-mur (4) 44a 44a 40p6 44m1 44m1 industrial (-40 o c to 85 o c) package type 44a 44-lead, thin (1.0mm) plastic gull wing quad flat package (tqfp) 40p6 40-pin, 0.600? wide, plastic dual inline package (pdip) 44m1 44-pad, 7 7 1.0mm body, lead pitch 0.50mm, thermally enhanced plastic very thin quad flat no-lead (vqfn)
23 atmega164a/164pa/324a/324pa/644a/644 pa/1284/1284p [datasheet summary] atmel-8272fs-avr--07/2014 9.7 atmel atmega1284 notes: 1. this device can also be supplied in wafer form. please contact your local atmel sales office for detailed ordering information and minimum quantities. 2. pb-free packaging, complies to the european directive for re striction of hazardous substances (rohs directive). also halide free and fully green. 3. for speed vs. v cc see ?speed grades? on page 324 . 4. tape & reel. speed [mhz] (3) power supply ordering code (2) package (1) operational range 20 1.8 - 5.5v atmega1284-au atmega1284-aur (4) atmega1284-pu atmega1284-mu atmega1284-mur (4) 44a 44a 40p6 44m1 44m1 industrial (-40 o c to 85 o c) package type 44a 44-lead, thin (1.0mm) plastic gull wing quad flat package (tqfp) 40p6 40-pin, 0.600? wide, plastic dual inline package (pdip) 44m1 44-pad, 7 7 1.0mm body, lead pitch 0.50mm, quad flat no-lead/micro lead frame package (qfn/mlf)
24 atmega164a/164pa/324a/324pa/644a/644 pa/1284/1284p [datasheet summary] atmel-8272fs-avr--07/2014 9.8 atmel atmega1284p notes: 1. this device can also be supplied in wafer form. please contact your local atmel sales office for detailed ordering information and minimum quantities. 2. pb-free packaging, complies to the european directive for re striction of hazardous substances (rohs directive). also halide free and fully green. 3. for speed vs. v cc see ?speed grades? on page 324 . 4. tape & reel. speed [mhz] (3) power supply ordering code (2) package (1) operational range 20 1.8 - 5.5v atmega1284p-au atmega1284p-aur (4) atmega1284p-pu atmega1284p-mu atmega1284p-mur (4) 44a 44a 40p6 44m1 44m1 industrial (-40 o c to 85 o c) package type 44a 44-lead, thin (1.0mm) plastic gull wing quad flat package (tqfp) 40p6 40-pin, 0.600? wide, plastic dual inline package (pdip) 44m1 44-pad, 7 7 1.0mm body, lead pitch 0.50mm, quad flat no-lead/micro lead frame package (qfn/mlf)
25 atmega164a/164pa/324a/324pa/644a/644 pa/1284/1284p [datasheet summary] atmel-8272fs-avr--07/2014 10. packaging information 10.1 44a 44a, 44-lead, 10 x 10mm body size, 1.0mm body thickness, 0.8 mm lead pitch, thin profile plastic quad flat package (tqfp) c 44a 06/02/2014 pin 1 identifier 0~7 pin 1 l c a1 a2 a d1 d e e1 e b common dimensions (unit of measure = mm) symbol min nom max note notes: 1. this package conforms to jedec reference ms-026, variation acb. 2. dimensions d1 and e1 do not include mold protrusion. allowable protrusion is 0.25mm per side. dimensions d1 and e1 are maximum plastic body size dimensions including mold mismatch. 3. lead coplanarity is 0.10mm maximum. a ? ? 1.20 a1 0.05 ? 0.15 a2 0.95 1.00 1.05 d 11.75 12.00 12.25 d1 9.90 10.00 10.10 note 2 e 11.75 12.00 12.25 e1 9.90 10.00 10.10 note 2 b 0.30 0.37 0.45 c 0.09 (0.17) 0.20 l 0.45 0.60 0.75 e 0.80 typ
26 atmega164a/164pa/324a/324pa/644a/644 pa/1284/1284p [datasheet summary] atmel-8272fs-avr--07/2014 10.2 40p6 pin 1 e1 a1 b ref e b1 c l seating plane a 0o ~ 15o d e eb common dimensions (unit of measure = mm) symbol min nom max note a ? ? 4.826 a1 0.381 ? ? d 52.070 ? 52.578 note 2 e 15.240 ? 15.875 e1 13.462 ? 13.970 note 2 b 0.356 ? 0.559 b1 1.041 ? 1.651 l 3.048 ? 3.556 c 0.203 ? 0.381 eb 15.494 ? 17.526 e 2.540 typ 1. this package conforms to jedec reference ms-011, variation ac. 2. dimensions d and e1 do not include mold flash or protrusion. mold flash or protrusion shall not exceed 0.25mm (0.010 " ). notes: 40p6 , 40-lead (0.600"/15.24mm wide) plastic dual inline package (pdip) 40p6 c 13/02/2014
27 atmega164a/164pa/324a/324pa/644a/644 pa/1284/1284p [datasheet summary] atmel-8272fs-avr--07/2014 10.3 44m1 title dra wing no . rev . package drawing contact: packagedrawings@atmel.com 44mc a 9/13/07 d2 e2 l l b15 a18 b11 a13 b10 a12 b6 a7 a6 b5 b1 b20 a1 a24 et l b r0.20 0.40 er a19 b16 et/2 side view a1 a y c d e pin 1 id top view bottom view note: 1. the terminal #1 id is a laser-marked feature . common dimensions (unit of measure = mm) symbol min nom max note a 0.80 0.90 1.00 a1 0.00 0.02 0.05 b 0.18 0.23 0.30 c 0.20 ref d 4.90 5.00 5.10 d2 2.55 2.60 2.65 e 4.90 5.00 5.10 e2 2.55 2.60 2.65 et C 0.70 C er C 0.40 C k 0.45 C C l 0.30 0.35 0.40 y 0.00 C 0.075 44mc, 44qfn (2-row staggered), 5 x 5 x 1.00 mm body, 2.60 x 2.60 mm exposed pad, quad flat no lead package
28 atmega164a/164pa/324a/324pa/644a/644 pa/1284/1284p [datasheet summary] atmel-8272fs-avr--07/2014 10.4 44mc title dra wing no . rev . package drawing contact: packagedrawings@atmel.com 44mc a 9/13/07 d2 e2 l l b15 a18 b11 a13 b10 a12 b6 a7 a6 b5 b1 b20 a1 a24 et l b r0.20 0.40 er a19 b16 et/2 side view a1 a y c d e pin 1 id top view bottom view note: 1. the terminal #1 id is a laser-marked feature . common dimensions (unit of measure = mm) symbol min nom max note a 0.80 0.90 1.00 a1 0.00 0.02 0.05 b 0.18 0.23 0.30 c 0.20 ref d 4.90 5.00 5.10 d2 2.55 2.60 2.65 e 4.90 5.00 5.10 e2 2.55 2.60 2.65 et C 0.70 C er C 0.40 C k 0.45 C C l 0.30 0.35 0.40 y 0.00 C 0.075 44mc, 44qfn (2-row staggered), 5 x 5 x 1.00 mm body, 2.60 x 2.60 mm exposed pad, quad flat no lead package
29 atmega164a/164pa/324a/324pa/644a/644 pa/1284/1284p [datasheet summary] atmel-8272fs-avr--07/2014 10.5 49c2 title drawing no. gpc rev. package drawing contact: packagedrawings@atmel.com 49c2 cbd a 49c2, 49-ball (7 x 7 array), 0.65mm pitch, 5.0 x 5.0 x 1.0mm, very thin, fine-pitch ball grid array package (vfbga) 3/14/08 common dimensions (unit of measure = mm) symbol min nom max note a C C 1.00 a1 0.20 C C a2 0.65 C C d 4.90 5.00 5.10 d1 3.90 bsc e 4.90 5.00 5.10 e1 3.90 bsc b 0.30 0.35 0.40 e 0.65 bsc top view side view a1 ball id g f e d c b a 12 3 4 5 6 7 a a1 a2 d e 0.10 e1 d1 49 - ? 0.35 0.05 e a1 ball corner bottom view b e
30 atmega164a/164pa/324a/324pa/644a/644 pa/1284/1284p [datasheet summary] atmel-8272fs-avr--07/2014 11. errata 11.1 errata for atmega164a 11.1.1 rev. e no known errata. 11.2 errata for atmega164pa 11.2.1 rev. e no known errata. 11.3 errata for atmega324a 11.3.1 rev. f no known errata. 11.4 errata for atmega324pa 11.4.1 rev. f no known errata. 11.5 errata for atmega644a 11.5.1 rev. f no known errata. 11.6 errata for atmega644pa 11.6.1 rev. f no known errata. 11.7 errata for atmega1284 11.7.1 rev. b no known errata. 11.8 errata for atmega1284p 11.8.1 rev. b no known errata.
31 atmega164a/164pa/324a/324pa/644a/644 pa/1284/1284p [datasheet summary] atmel-8272fs-avr--07/2014 12. datasheet revision history please note that the referring page numbers in this sect ion are referred to this document. the referring revision in this section ar e referring to the document revision. 12.1 rev. 8272f - 08/2014 12.2 rev. 8272e - 04/2013 1. updated text in section 13.2.8 ?pcmsk1 ? pin change mask register 1? on page 70 to: ? if pcint15:8 is set and the pcie1 bit in pcicr is set, pin change interrupt is enabled on the corresponding i/o pin.? 2. corrected description of pagemsb in table 26-9 on page 281 . the device has 64 words in a page and not 128. 3. corrected description of pagemsb in table 26-12 on page 282 . pagesmb is 5 and the device has 64 words in a page and not 128. the page require six bits and not seven. 4. corrected values in table 26-16 on page 284 . pagemsb is 6. zpagemsb is z7 and pcpage is z15:z8 5. corrected value for pcpage in table 27-7 on page 290 . the correct value is pc[14:7] 6. updated description in table 17-2 on page 151 to ?normal port operation, oc2a disconnected.? 7. updated assembly code examples on for ?watchdog timer? on page 55 . and onwards ?out wdtcsr, r16? changed to ?sts wdtcsr, r16? ?in r16, wdtcsr? changed to ?lds r16, wdtcsr? ?idi r16, wdtcsr? changed to ?lds r16, wdtcsr? 8. updated addresses 0x65 and 0x64 in section 7. ?register summary? on page 10 . 9. removed notes 5 and 6 from table 28-16 on page 328 . 10. corrected values in section 8. ?instruction set summary? on page 14 .changed clock values for rcall and icall to 2, for call, ret and reti to 4. also changed values in section 7.7.1 ?interrupt response time? on page 18 . 11. updated layout, footer and back page according to template 0205/2014 1. updated figure 1-1 on page 3 and figure 2-1 on page 6 : t3 and t/c3 only available in atmega1284/1284p. 2. updated descriptive text on page 6 to indi cate that atmega1284/1284p has four t/cs. 3. updated the assembly code example for wdt_off (p.56) following the ej# 705736. 4. added note in ?16-bit timer/counter1 and timer/counter3 (1) with pwm? on page 107 . 5. added ?prescaler reset? on page 112 . 6. corrected three typo for waveform gen eration mode (wg m) instead of mgm. 7. updated table 23-6 on page 253 . adc auto trigger source selections, adts=0b011, the statement is timer/coun ter0 compare match a.
32 atmega164a/164pa/324a/324pa/644a/644 pa/1284/1284p [datasheet summary] atmel-8272fs-avr--07/2014 12.3 rev. 8272d - 05/12 12.4 rev. 8272c - 06/11 12.5 rev. 8272b - 05/11 8. updated table 27-18 on page 310 . command for 6d poll for fuse write complete: 0111011_00000000 9. updated the table notes of the table 28-1 on page 318 . 10. updated ?register summary? on page 10 . added table note 7: only available in atmega1284/1284p. 1. updated ?power-down mode? on page 44 . 2. updated ?overview? on page 67 . 3. corrected references for bit 2, bit 1, and bit 0 in section ?ucsrnc ? usart mspim control and status register n c? on page 201 . 4. several small corrections throughout the whole document made according to the template 5. notes in table 27-17 on page 304 have been corrected 6. note (1) in table 28-3 on page 320 is added 1. updated ?atmel atmega1284p dc characteristics? on page 323 . 1. added atmel qtouch library support and qtouch sensing capability features. 2. replaced the figure 1-1 on page 3 by an updated ?pinout.? that includes timer/counter3. 3. replaced the figure 7-1 on page 10 by an updated ?block diagram of the avr architecture.? that includes timer/counter3. 4. added ?rampz ? extended z-point er register for elpm/spm (1) ? on page 15 . 5. added ?prr1 ? power reduction register 1? on page 49 . 6. renamed prr to ?prr0 ? power reduction register 0? on page 48 . 7. updated ?pcifr ? pin change interrupt flag register? on page 69 . pcicr replaces eimsr in the pcif3, pcif2, pcif1 and pcif0 bit description. 8. updated ?pcmsk3 ? pin change mask register 3? on page 70 . pcie3 replaces pcie2 in the bit description. 9. updated ?alternate functions of port b? on page 80 to include timer/counter3 10. updated ?alternate functions of port d? on page 86 to include timer/counter3 11. added ?tcnt3h and tcnt3l ?timer/counter3? on page 132 12. added ?ocr3ah and ocr3al ? output compare register3 a? on page 133 13. added ?ocr3bh and ocr3bl ? output compare register3 b? on page 133 14. added ?timsk3 ? timer/counter3 interrupt mask register? on page 134 15. updated all ?spi ? serial peripheral inte rface? ?register description? to reflect atmega1284 and atmega1284p. 16. updated ?addressing the flash during self-programming? on page 274 to include rampz register.
33 atmega164a/164pa/324a/324pa/644a/644 pa/1284/1284p [datasheet summary] atmel-8272fs-avr--07/2014 12.6 rev. 8272a - 01/10 17. updated table 27-16 on page 303 . t wd_eeprom is 3.6ms instead of 9ms. 18. bods and bodse bits denoted as r/w 19. description of external pin modes below table 16-9 removed. 20. updated ?register summary? on page 10 to include timer/counter3. 21. updated the datasheet with atmel new style guide. 1. initial revision (based on the atmega164pa/ 324pa/644pa/1284p datasheet 8252g-avr-11/09 and on the atmega644 data sheet 2593n-avr-09/09). 2. changes done: ? non-picopower devices added: atmega164a/324a/644a/1284 ? updated table 2-1 on page 7 ? updated table 10-1 on page 42 ? updated ?sleep modes? on page 42 and ?bod disable (1) ? on page 43 ? updated ?register description? on page 67 ? updated ?usart? on page 167 and ?usart in spi mode? on page 194 ? updated ?signature bytes? on page 290 and ?page size? on page 290 ? added ?dc characteristics? on page 318 for non-picopower devices. ? added ?atmel atmega164a typical characteristics? on page 333 ? added ?atmel atmega324a typical characteristics? on page 386 ? added ?atmel atmega644a typical characteristics? on page 438 ? added ?atmega1284 typical characteristics? on page 490 ? added ?ordering information? on page 17 for non-picopower devices ? added ?errata for atmega164a? on page 30 ? added ?errata for atmega324a? on page 30 ? added ?errata for atmega644pa? on page 30 ? added ?errata for atmega1284? on page 30
x x xx x x atmel corporation 1600 technology drive, san jose, ca 95110 usa t: (+1)(408) 441.0311 f: (+1)(408) 436.4200 | www.atmel.com ? 2014 atmel corporation. / rev.: atmel-8272fs-avr-atmega164a/pa/324a/pa/644a/pa/1284/p-datasheet summary_07/2014. atmel ? , atmel logo and combinations thereof, enabling unlimited possibilities, and others are registered trademarks or trademarks of atmel corporation in u.s. and other countries. other terms and product names may be trademarks of others. disclaimer: the information in this document is provided in c onnection with atmel products. no license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of atmel products. except as set forth in the atmel terms and condit ions of sales located on the atmel website, atmel assumes no liability wh atsoever and disclaims any express, implied or statutory warranty relating to its p roducts including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or non-infringement. in no event shall atmel be liable for any direct, indirect, consequential, pu nitive, special or incidental damages (including, without limi tation, damages for loss and profits, business interruption, or loss of information ) arising out of the use or inability to use this document, even if atmel has been advised of the possibility of such damages. atmel makes no r epresentations or warranties with respect to the accuracy or c ompleteness of the contents of this document and reserves the right to make changes to specificatio ns and products descriptions at any time without notice. atmel d oes not make any commitment to update the information contained herein. unless specifically provided otherwise, atme l products are not suitable for, and shall not be used in, automo tive applications. atmel products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. safety-critical, military, and automotive applications disclaim er: atmel products are not designed for and will not be used in connection with any applications where the failure of such products would reasonably be expected to re sult in significant personal inju ry or death (?safety-critical a pplications?) without an atmel officer's specific written consent. safety-critical applications incl ude, without limitation, life support devices and systems, equipment or systems for t he operation of nuclear facilities and weapons systems. atmel products are not designed nor intended for use in military or aerospace applications or environments unless specifically designated by atmel as military- grade. atmel products are not designed nor intended for use in automot ive applications unless spec ifically designated by atmel as automotive-grade.


▲Up To Search▲   

 
Price & Availability of ATMEGA324PA-14

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X